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8 results for “risc-v”
SiFive pushes development server to take RISC-V into the datacenter - The Register
SiFive announced a new development server platform designed to advance RISC-V architecture adoption in datacenter environments, positioning it as a foundational step toward enterprise-scale deployment.
Aug 26, 2026
A 3rd World Embedded Engineer Responds to "RISC-V They Should Have Known Better"
A forum comment thread on Hacker News responds to a critique of RISC-V adoption in developing economies, but no substantive article or claim is provided in the source material.
Aug 16, 2026
RISC-V: They should have known better
A Hacker News thread titled 'RISC-V: They should have known better' contains user comments discussing RISC-V, but the article provides no factual reporting, event description, or verifiable context about RISC-V developments, actors, or consequences.
Aug 15, 2026
Spectre rears its ugly head again as researchers show some RISC-V chips are susceptible - The Register
Researchers demonstrated Spectre-style speculative execution side-channel vulnerabilities on certain RISC-V processor implementations, revealing a security risk previously associated mainly with x86 and ARM architectures.
Published Aug 12, 2026 · Analyzed Aug 16, 2026
Show HN: A Project Oberon System version running on RISC-V instead of RISC-5
A user-submitted project demonstrates a port of Project Oberon — a minimalist operating system and development environment originally designed for the RISC-5 architecture — to the open-standard RISC-V instruction set.
Aug 10, 2026
RISC-V Is Inevitable: State of the Union Keynote Argues
A Hacker News forum thread titled 'RISC-V Is Inevitable: State of the Union Keynote Argues' features user comments discussing a keynote presentation that asserts RISC-V’s unavoidable rise in processor architecture — but the article provides no direct reporting, transcript, source link, or verifiable details about the keynote itself.
Jul 15, 2026
Book: RISC-V System-on-Chip Design
A Hacker News thread titled 'Book: RISC-V System-on-Chip Design' contains user comments about a technical book on RISC-V SoC design, with no reported news event, announcement, or development.
Published Jul 9, 2026 · Analyzed Jul 11, 2026
Madlad builds homebrew GPU using 8,192 RISC-V chips - The Register
An individual developer known as 'Madlad' constructed a custom GPU prototype using 8,192 RISC-V cores, representing an experimental, non-commercial hardware effort in open instruction-set computing.
Published Jul 6, 2026 · Analyzed Jul 8, 2026